1. Field
An embodiment of the present invention relates to the field of high frequency integrated circuits and, more particularly, to a zero detect circuit and method for use in high frequency integrated circuits.
2. Discussion of Related Art
Zero detect circuitry, a simple example of which is a NOR gate, may be used in microprocessors and other types of integrated circuits for a variety of different purposes. For example, in a processor, zero detect circuitry may be used in floating point and/or integer execution units to detect leading zeros and/or zero data and/or in a processor front-end to process address information.
As the operating frequencies of processors and other integrated circuits continue to increase, zero detect operations should be performed very fast in order not to compromise performance of the host integrated circuit. As operating frequencies have continued to increase, data, instruction and address widths have also increased.
Conventional zero detect circuits have been implemented in static complementary metal oxide semiconductor (CMOS) logic using AND/OR gates. Static CMOS logic is notoriously slow such that a static CMOS zero detect circuit typically does not meet the needs of today""s high performance microprocessors, for example. Further, multiple logic stages may be needed to implement a zero detect circuit to handle wider data, instruction and/or address information.